The simulation script requests the target firmware in hex as its input. The testbench loads the firmware to the SoC memory and runs it. Any data sent by the SoC through UART is printed on the terminal of the running simulator. This allows for feedback of the simulation (firmware/processor working) without the requirement of specifically debugging it.
./generate_bench ./run_bench <your_firmware.hex> (e.g. ./run_bench ../../sw/uart/uart.hex)
If you want to view the waveforms produced by the design, uncomment WAVEFORM_OUTPUT under minsoc/backend/minsoc_bench_defines.v. Load then the waveform output minsoc/sim/result/minsoc_wave.lxt2 with the Gtkwave waveform viewer. Windows and Linux versions can be downloaded here. You can drag the file into the Gtkwave window to load the waveform.
* Notice that you are also able to debug the simulation. To do so, check this.